1. Field of the Invention
The present invention relates to a multiprocessing information handling system and more particularly to a multiprocessing information handling system having a host system and one or more guest systems running concurrently wherein control of I/O interrupts is examined during polling intervals of a hypervisor program.
2. Background
Virtual machine (VM) hypervisor programs have been in public use for many years, e.g. IBM VM/System Product (SP). VM/SP normally is loaded into the high address end of main storage and coordinates the running of programs by a plurality of users who respectively interface a data processing system from any of a number of keyboard/display terminals which are usually distant from the one or more central processing units (CPUs) and the main storage (MS) of the system.
The advantage of VM is that it gives each of its users the apparent data processing power of a large system by giving each user an apparent or logical CPU. Plural logical CPUs could share each real CPU resource(s) in the system. The VM users (who are sometimes called "guests" of the VM "host" control program) are assigned by the VM control program to different MS areas in which to operate as the user performs work on the system.
Any VM guest may run any type of program that is designed to interface the architecture of the connected real system, e.g. the S/360, S/370, S/370XA or S/390 architected instruction set may be used by any guest program running on a S/390 hardware system.
Operating systems programs, such as MVS, have been run as one of plural guests under VM/SP, under which MVS/SP was often the preferred guest because it was used as the production svstem. The preferred guest managed its assigned part of MS, which is called the guest's real storage since to the guest operating system this is the system storage under its control. The preferred guest was run with its virtual storage addresses translating to the guest real addresses that are equal to a host virtual address that is equal to host's real storage addresses, and was sometimes called the V=R guest (i.e., host virtual=host real).
Logical resource partitioning of a data processing system is taught in U.S. Pat. No. 4,843,541. The system described in the '541 patent provides extensive background information which is helpful to understanding the present invention.
U.S. Pat. No. 4,843,541 is hereby incorporated by reference into the present application.
The logical resource partitioning taught in the '541 patent relates to method and means for partitioning resources of a central electronic complex of a data processing system into a plurality of logical partitions. The partitioning system may be embodied in programming, microcode or by special hardware to enable highly efficient operation of a plurality of different programming systems in different zones of the system. The patent shows assignment of subsets of random access storage, central processor, I/O channel and subchannel resources to different logical partitions of the system to enable a plurality of different preferred guest programming systems to run simultaneously in the different partitions. The system of the patent also includes partitioning the I/O channel and subchannel resources among different partitions.
U.S. Pat. No. 5,222,215 teaches a hardware mechanism for I/O interruption handling in a multiprocessing system. A processor interface recognizes a large number of I/O interrupt queues in a logically partitioned data processing system. Different partitions may contain different guest operating systems. The processor interface controls how plural processors respond to I/O interrupts on numerous hardware control queues. A host hypervisor program dispatches the guest operating systems. The guest systems use the I/O interruptions in controlling the dispatching of programs on the processors in the system. A system taught by the patent allows the number of guest partitions in a system to exceed the number of I/O interrupt subclasses architected into the system and enables the dispatching controls of each guest operating system to be sensitive to different priorities for a number of programs operating under a respective guest. The invention described in the patent provides processor controls which support alerting the host to enable I/O interrupts and provide the processor control to pass-through for enabling direct guest handling of guest I/O interrupts.
although the system taught by the patent handles I/O interrupts in such a manner as to prevent a guest system from blocking an I/O interrupt for the host system, the patented system provides a solution which is very complex and expensive in hardware implementation and is not the most efficient solution to the problem of dealing with guest system blocking host I/O interrupts.
The above-described prior art, while showing improvements in data processing systems having a number of processes running concurrently in different partitions of the system, did not adequately address the problem which occurs when a guest system blocks an I/O interrupt directed to the host system in a multiprocessing data processing system.